164 lines
4.4 KiB
C
164 lines
4.4 KiB
C
/*
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* This board file is used for the following setup:
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* An ILI9488 display controller connected to an STM32F446VET micro controller through a 16-bit
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* parallel interface (Intel 8080 compatible). The FMC interface of the STM32 micro controller is used.
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* LCD_CS is hooked up to NE1 (first SRAM bank) and LCD_RS is hooked up to A16.
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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#include "stm32f4xx_hal.h"
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#define GDISP_REG (*((volatile gU16 *) 0x60000000)) /* RS = 0 */
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#define GDISP_RAM (*((volatile gU16 *) 0x60020000)) /* RS = 1 */
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static GFXINLINE void init_board(GDisplay *g)
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{
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GPIO_InitTypeDef GPIO_InitStruct;
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SRAM_HandleTypeDef hsram;
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FMC_NORSRAM_TimingTypeDef Timing;
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(void)g;
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// Peripheral clocks
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_FMC_CLK_ENABLE();
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// PC6 (backlight)
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GPIO_InitStruct.Pin = GPIO_PIN_6;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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// PD3 (reset)
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GPIO_InitStruct.Pin = GPIO_PIN_3;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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// FSMC
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{
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// Common GPIO configuration
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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// GPIOD configuration
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GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_7 | GPIO_PIN_8 |\
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GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_14 | GPIO_PIN_15;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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// GPIOE configuration
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GPIO_InitStruct.Pin = GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 |\
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GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
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HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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// SRAM device configuration
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hsram.Instance = FMC_NORSRAM_DEVICE;
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hsram.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
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// hsram.Init
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hsram.Init.NSBank = FMC_NORSRAM_BANK1;
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hsram.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
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hsram.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
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hsram.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
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hsram.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
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hsram.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
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hsram.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
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hsram.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
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hsram.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
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hsram.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
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hsram.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
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hsram.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
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hsram.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
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hsram.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;
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hsram.Init.PageSize = FMC_PAGE_SIZE_NONE;
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// Timings
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Timing.AddressSetupTime = 0;
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Timing.AddressHoldTime = 0;
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Timing.DataSetupTime = 150;
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Timing.BusTurnAroundDuration = 0;
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Timing.CLKDivision = 0;
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Timing.DataLatency = 0;
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Timing.AccessMode = FMC_ACCESS_MODE_A;
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HAL_SRAM_Init(&hsram, &Timing, NULL);
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}
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}
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static GFXINLINE void post_init_board(GDisplay* g)
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{
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(void) g;
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}
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static GFXINLINE void setpin_reset(GDisplay *g, gBool state)
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{
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(void) g;
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if (state) {
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HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_SET);
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} else {
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HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_RESET);
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}
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}
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static GFXINLINE void set_backlight(GDisplay* g, gU8 percent)
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{
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(void) g;
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if (percent > 0) {
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HAL_GPIO_WritePin(GPIOC, GPIO_PIN_6, GPIO_PIN_SET);
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} else {
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HAL_GPIO_WritePin(GPIOC, GPIO_PIN_6, GPIO_PIN_RESET);
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}
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}
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static GFXINLINE void acquire_bus(GDisplay* g)
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{
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(void) g;
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}
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static GFXINLINE void release_bus(GDisplay* g)
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{
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(void) g;
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}
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static GFXINLINE void write_index(GDisplay* g, gU16 index)
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{
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(void) g;
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GDISP_REG = index;
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}
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static GFXINLINE void write_data(GDisplay* g, gU16 data)
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{
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(void) g;
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GDISP_RAM = data;
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}
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static GFXINLINE void setreadmode(GDisplay* g)
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{
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(void) g;
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}
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static GFXINLINE void setwritemode(GDisplay* g)
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{
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(void) g;
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}
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static GFXINLINE gU16 read_data(GDisplay* g)
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{
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(void) g;
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return (gU16)GDISP_RAM;
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}
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#endif /* _GDISP_LLD_BOARD_H */
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