954 lines
58 KiB
C
954 lines
58 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*
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* Setup for STMicroelectronics STM32 Nucleo32-L011K4 board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_ST_NUCLEO32_L011K4
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#define BOARD_NAME "STMicroelectronics STM32 Nucleo32-L011K4"
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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* NOTE: HSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0U
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#endif
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#define STM32_LSEDRV (3U << 11U)
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 0U
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#endif
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32L011xx
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/*
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* IO pins assignments.
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*/
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#define GPIOA_ARD_A0 0U
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#define GPIOA_ARD_A1 1U
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#define GPIOA_VCP_TX 2U
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#define GPIOA_ARD_A2 3U
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#define GPIOA_ARD_A3 4U
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#define GPIOA_ARD_A4 5U
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#define GPIOA_ARD_A5 6U
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#define GPIOA_ARD_A6 7U
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#define GPIOA_ARD_D9 8U
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#define GPIOA_ARD_D1 9U
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#define GPIOA_ARD_D0 10U
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#define GPIOA_ARD_D10 11U
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#define GPIOA_ARD_D2 12U
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#define GPIOA_SWDIO 13U
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#define GPIOA_SWCLK 14U
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#define GPIOA_VCP_RX 15U
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#define GPIOB_ARD_D3 0U
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#define GPIOB_ARD_D6 1U
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#define GPIOB_PIN2 2U
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#define GPIOB_ARD_D13 3U
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#define GPIOB_LED_GREEN 3U
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#define GPIOB_ARD_D12 4U
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#define GPIOB_ARD_D11 5U
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#define GPIOB_ARD_D5 6U
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#define GPIOB_ARD_A5_ALT 6U
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#define GPIOB_ARD_D4 7U
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#define GPIOB_ARD_A4_ALT 7U
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#define GPIOB_PIN8 8U
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#define GPIOB_PIN9 9U
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#define GPIOB_PIN10 10U
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#define GPIOB_PIN11 11U
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#define GPIOB_PIN12 12U
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#define GPIOB_PIN13 13U
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#define GPIOB_PIN14 14U
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#define GPIOB_PIN15 15U
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#define GPIOC_PIN0 0U
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#define GPIOC_PIN1 1U
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#define GPIOC_PIN2 2U
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#define GPIOC_PIN3 3U
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#define GPIOC_PIN4 4U
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#define GPIOC_PIN5 5U
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#define GPIOC_PIN6 6U
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#define GPIOC_PIN7 7U
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#define GPIOC_PIN8 8U
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#define GPIOC_PIN9 9U
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#define GPIOC_PIN10 10U
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#define GPIOC_PIN11 11U
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#define GPIOC_PIN12 12U
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#define GPIOC_PIN13 13U
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#define GPIOC_PIN14 14U
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#define GPIOC_PIN15 15U
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#define GPIOD_PIN0 0U
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#define GPIOD_PIN1 1U
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#define GPIOD_PIN2 2U
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#define GPIOD_PIN3 3U
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#define GPIOD_PIN4 4U
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#define GPIOD_PIN5 5U
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#define GPIOD_PIN6 6U
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#define GPIOD_PIN7 7U
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#define GPIOD_PIN8 8U
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#define GPIOD_PIN9 9U
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#define GPIOD_PIN10 10U
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#define GPIOD_PIN11 11U
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#define GPIOD_PIN12 12U
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#define GPIOD_PIN13 13U
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#define GPIOD_PIN14 14U
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#define GPIOD_PIN15 15U
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#define GPIOE_PIN0 0U
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#define GPIOE_PIN1 1U
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#define GPIOE_PIN2 2U
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#define GPIOE_PIN3 3U
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#define GPIOE_PIN4 4U
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#define GPIOE_PIN5 5U
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#define GPIOE_PIN6 6U
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#define GPIOE_PIN7 7U
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#define GPIOE_PIN8 8U
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#define GPIOE_PIN9 9U
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#define GPIOE_PIN10 10U
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#define GPIOE_PIN11 11U
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#define GPIOE_PIN12 12U
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#define GPIOE_PIN13 13U
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#define GPIOE_PIN14 14U
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#define GPIOE_PIN15 15U
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#define GPIOF_ARD_D7 0U
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#define GPIOF_ARD_D8 1U
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#define GPIOF_PIN2 2U
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#define GPIOF_PIN3 3U
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#define GPIOF_PIN4 4U
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#define GPIOF_PIN5 5U
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#define GPIOF_PIN6 6U
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#define GPIOF_PIN7 7U
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#define GPIOF_PIN8 8U
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#define GPIOF_PIN9 9U
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#define GPIOF_PIN10 10U
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#define GPIOF_PIN11 11U
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#define GPIOF_PIN12 12U
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#define GPIOF_PIN13 13U
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#define GPIOF_PIN14 14U
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#define GPIOF_PIN15 15U
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/*
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* IO lines assignments.
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*/
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#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U)
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#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U)
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#define LINE_VCP_TX PAL_LINE(GPIOA, 2U)
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#define LINE_ARD_A2 PAL_LINE(GPIOA, 3U)
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#define LINE_ARD_A3 PAL_LINE(GPIOA, 4U)
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#define LINE_ARD_A4 PAL_LINE(GPIOA, 5U)
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#define LINE_ARD_A5 PAL_LINE(GPIOA, 6U)
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#define LINE_ARD_A6 PAL_LINE(GPIOA, 7U)
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#define LINE_ARD_D9 PAL_LINE(GPIOA, 8U)
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#define LINE_ARD_D1 PAL_LINE(GPIOA, 9U)
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#define LINE_ARD_D0 PAL_LINE(GPIOA, 10U)
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#define LINE_ARD_D10 PAL_LINE(GPIOA, 11U)
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#define LINE_ARD_D2 PAL_LINE(GPIOA, 12U)
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#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
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#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
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#define LINE_VCP_RX PAL_LINE(GPIOA, 15U)
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#define LINE_ARD_D3 PAL_LINE(GPIOB, 0U)
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#define LINE_ARD_D6 PAL_LINE(GPIOB, 1U)
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#define LINE_ARD_D13 PAL_LINE(GPIOB, 3U)
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#define LINE_LED_GREEN PAL_LINE(GPIOB, 3U)
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#define LINE_ARD_D12 PAL_LINE(GPIOB, 4U)
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#define LINE_ARD_D11 PAL_LINE(GPIOB, 5U)
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#define LINE_ARD_D5 PAL_LINE(GPIOB, 6U)
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#define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U)
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#define LINE_ARD_D4 PAL_LINE(GPIOB, 7U)
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#define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U)
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#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U)
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#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U)
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
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#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
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#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
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#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
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/*
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* GPIOA setup:
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*
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* PA0 - ARD_A0 (input pullup).
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* PA1 - ARD_A1 (input pullup).
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* PA2 - VCP_TX (alternate 4).
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* PA3 - ARD_A2 (input pullup).
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* PA4 - ARD_A3 (input pullup).
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* PA5 - ARD_A4 (input pullup).
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* PA6 - ARD_A5 (input pullup).
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* PA7 - ARD_A6 (input pullup).
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* PA8 - ARD_D9 (input pullup).
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* PA9 - ARD_D1 (input pullup).
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* PA10 - ARD_D0 (input pullup).
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* PA11 - ARD_D10 (input pullup).
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* PA12 - ARD_D2 (input pullup).
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* PA13 - SWDIO (alternate 0).
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* PA14 - SWCLK (alternate 0).
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* PA15 - VCP_RX (alternate 4).
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \
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PIN_MODE_INPUT(GPIOA_ARD_A1) | \
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PIN_MODE_ALTERNATE(GPIOA_VCP_TX) | \
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PIN_MODE_INPUT(GPIOA_ARD_A2) | \
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PIN_MODE_INPUT(GPIOA_ARD_A3) | \
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PIN_MODE_INPUT(GPIOA_ARD_A4) | \
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PIN_MODE_INPUT(GPIOA_ARD_A5) | \
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PIN_MODE_INPUT(GPIOA_ARD_A6) | \
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PIN_MODE_INPUT(GPIOA_ARD_D9) | \
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PIN_MODE_INPUT(GPIOA_ARD_D1) | \
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PIN_MODE_INPUT(GPIOA_ARD_D0) | \
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PIN_MODE_INPUT(GPIOA_ARD_D10) | \
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PIN_MODE_INPUT(GPIOA_ARD_D2) | \
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PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
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PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
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PIN_MODE_ALTERNATE(GPIOA_VCP_RX))
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \
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PIN_OTYPE_PUSHPULL(GPIOA_VCP_TX) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_A3) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_A4) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_A5) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_A6) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D9) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_VCP_RX))
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \
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PIN_OSPEED_MEDIUM(GPIOA_VCP_TX) | \
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PIN_OSPEED_MEDIUM(GPIOA_ARD_A2) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_A3) | \
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PIN_OSPEED_MEDIUM(GPIOA_ARD_A4) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_A5) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_A6) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_D9) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_D1) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_D0) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \
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PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
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PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
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PIN_OSPEED_HIGH(GPIOA_VCP_RX))
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \
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PIN_PUPDR_FLOATING(GPIOA_VCP_TX) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_A3) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_A4) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_A5) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_A6) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_D9) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_D1) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_D0) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_D10) | \
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PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \
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PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
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PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
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PIN_PUPDR_FLOATING(GPIOA_VCP_RX))
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#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \
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PIN_ODR_HIGH(GPIOA_ARD_A1) | \
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PIN_ODR_HIGH(GPIOA_VCP_TX) | \
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PIN_ODR_HIGH(GPIOA_ARD_A2) | \
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PIN_ODR_HIGH(GPIOA_ARD_A3) | \
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PIN_ODR_LOW(GPIOA_ARD_A4) | \
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PIN_ODR_HIGH(GPIOA_ARD_A5) | \
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PIN_ODR_HIGH(GPIOA_ARD_A6) | \
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PIN_ODR_HIGH(GPIOA_ARD_D9) | \
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PIN_ODR_HIGH(GPIOA_ARD_D1) | \
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PIN_ODR_HIGH(GPIOA_ARD_D0) | \
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PIN_ODR_HIGH(GPIOA_ARD_D10) | \
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PIN_ODR_HIGH(GPIOA_ARD_D2) | \
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PIN_ODR_HIGH(GPIOA_SWDIO) | \
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PIN_ODR_HIGH(GPIOA_SWCLK) | \
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PIN_ODR_HIGH(GPIOA_VCP_RX))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \
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PIN_AFIO_AF(GPIOA_VCP_TX, 4U) | \
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PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_A3, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_A4, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_A5, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_A6, 0U))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D9, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_D1, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_D0, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_D10, 0U) | \
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PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \
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PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
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PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
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PIN_AFIO_AF(GPIOA_VCP_RX, 4U))
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/*
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* GPIOB setup:
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*
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* PB0 - ARD_D3 (input pullup).
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* PB1 - ARD_D6 (input pullup).
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* PB2 - PIN2 (input pullup).
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* PB3 - ARD_D13 LED_GREEN (output pushpull maximum).
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* PB4 - ARD_D12 (input pullup).
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* PB5 - ARD_D11 (input pullup).
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* PB6 - ARD_D5 ARD_A5_ALT (input pullup).
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* PB7 - ARD_D4 ARD_A4_ALT (input pullup).
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* PB8 - PIN8 (input pullup).
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* PB9 - PIN9 (input pullup).
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* PB10 - PIN10 (input pullup).
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* PB11 - PIN11 (input pullup).
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* PB12 - PIN12 (input pullup).
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* PB13 - PIN13 (input pullup).
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* PB14 - PIN14 (input pullup).
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* PB15 - PIN15 (input pullup).
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*/
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#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_D3) | \
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PIN_MODE_INPUT(GPIOB_ARD_D6) | \
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PIN_MODE_INPUT(GPIOB_PIN2) | \
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PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \
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PIN_MODE_INPUT(GPIOB_ARD_D12) | \
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PIN_MODE_INPUT(GPIOB_ARD_D11) | \
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PIN_MODE_INPUT(GPIOB_ARD_D5) | \
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PIN_MODE_INPUT(GPIOB_ARD_D4) | \
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PIN_MODE_INPUT(GPIOB_PIN8) | \
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PIN_MODE_INPUT(GPIOB_PIN9) | \
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PIN_MODE_INPUT(GPIOB_PIN10) | \
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PIN_MODE_INPUT(GPIOB_PIN11) | \
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PIN_MODE_INPUT(GPIOB_PIN12) | \
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PIN_MODE_INPUT(GPIOB_PIN13) | \
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PIN_MODE_INPUT(GPIOB_PIN14) | \
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PIN_MODE_INPUT(GPIOB_PIN15))
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#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \
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PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
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PIN_OTYPE_PUSHPULL(GPIOB_ARD_D13) | \
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PIN_OTYPE_PUSHPULL(GPIOB_ARD_D12) | \
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PIN_OTYPE_PUSHPULL(GPIOB_ARD_D11) | \
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PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \
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PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
|
|
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \
|
|
PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN2) | \
|
|
PIN_OSPEED_HIGH(GPIOB_ARD_D13) | \
|
|
PIN_OSPEED_HIGH(GPIOB_ARD_D12) | \
|
|
PIN_OSPEED_HIGH(GPIOB_ARD_D11) | \
|
|
PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \
|
|
PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN8) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN9) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN10) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN11) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN12) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN13) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN14) | \
|
|
PIN_OSPEED_HIGH(GPIOB_PIN15))
|
|
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_D3) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
|
|
PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_ARD_D12) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_ARD_D11) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOB_PIN15))
|
|
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_D3) | \
|
|
PIN_ODR_HIGH(GPIOB_ARD_D6) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN2) | \
|
|
PIN_ODR_LOW(GPIOB_ARD_D13) | \
|
|
PIN_ODR_HIGH(GPIOB_ARD_D12) | \
|
|
PIN_ODR_HIGH(GPIOB_ARD_D11) | \
|
|
PIN_ODR_HIGH(GPIOB_ARD_D5) | \
|
|
PIN_ODR_HIGH(GPIOB_ARD_D4) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOB_PIN15))
|
|
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_D3, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_ARD_D13, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_ARD_D12, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_ARD_D11, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_ARD_D5, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_ARD_D4, 0U))
|
|
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
|
|
PIN_AFIO_AF(GPIOB_PIN15, 0U))
|
|
|
|
/*
|
|
* GPIOC setup:
|
|
*
|
|
* PC0 - PIN0 (input pullup).
|
|
* PC1 - PIN1 (input pullup).
|
|
* PC2 - PIN2 (input pullup).
|
|
* PC3 - PIN3 (input pullup).
|
|
* PC4 - PIN4 (input pullup).
|
|
* PC5 - PIN5 (input pullup).
|
|
* PC6 - PIN6 (input pullup).
|
|
* PC7 - PIN7 (input pullup).
|
|
* PC8 - PIN8 (input pullup).
|
|
* PC9 - PIN9 (input pullup).
|
|
* PC10 - PIN10 (input pullup).
|
|
* PC11 - PIN11 (input pullup).
|
|
* PC12 - PIN12 (input pullup).
|
|
* PC13 - PIN13 (input pullup).
|
|
* PC14 - PIN14 (input pullup).
|
|
* PC15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOC_PIN15))
|
|
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
|
|
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN1) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN2) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN3) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN4) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN5) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN6) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN7) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN8) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN9) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN10) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN11) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN12) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN13) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN14) | \
|
|
PIN_OSPEED_HIGH(GPIOC_PIN15))
|
|
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOC_PIN15))
|
|
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOC_PIN15))
|
|
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN7, 0U))
|
|
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN14, 0U) | \
|
|
PIN_AFIO_AF(GPIOC_PIN15, 0U))
|
|
|
|
/*
|
|
* GPIOD setup:
|
|
*
|
|
* PD0 - PIN0 (input pullup).
|
|
* PD1 - PIN1 (input pullup).
|
|
* PD2 - PIN2 (input pullup).
|
|
* PD3 - PIN3 (input pullup).
|
|
* PD4 - PIN4 (input pullup).
|
|
* PD5 - PIN5 (input pullup).
|
|
* PD6 - PIN6 (input pullup).
|
|
* PD7 - PIN7 (input pullup).
|
|
* PD8 - PIN8 (input pullup).
|
|
* PD9 - PIN9 (input pullup).
|
|
* PD10 - PIN10 (input pullup).
|
|
* PD11 - PIN11 (input pullup).
|
|
* PD12 - PIN12 (input pullup).
|
|
* PD13 - PIN13 (input pullup).
|
|
* PD14 - PIN14 (input pullup).
|
|
* PD15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOD_PIN15))
|
|
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
|
|
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN1) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN2) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN3) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN4) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN5) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN6) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN7) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN8) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN9) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN10) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN11) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN12) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN13) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN14) | \
|
|
PIN_OSPEED_HIGH(GPIOD_PIN15))
|
|
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOD_PIN15))
|
|
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN1) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOD_PIN15))
|
|
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN7, 0U))
|
|
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
|
|
PIN_AFIO_AF(GPIOD_PIN15, 0U))
|
|
|
|
/*
|
|
* GPIOE setup:
|
|
*
|
|
* PE0 - PIN0 (input pullup).
|
|
* PE1 - PIN1 (input pullup).
|
|
* PE2 - PIN2 (input pullup).
|
|
* PE3 - PIN3 (input pullup).
|
|
* PE4 - PIN4 (input pullup).
|
|
* PE5 - PIN5 (input pullup).
|
|
* PE6 - PIN6 (input pullup).
|
|
* PE7 - PIN7 (input pullup).
|
|
* PE8 - PIN8 (input pullup).
|
|
* PE9 - PIN9 (input pullup).
|
|
* PE10 - PIN10 (input pullup).
|
|
* PE11 - PIN11 (input pullup).
|
|
* PE12 - PIN12 (input pullup).
|
|
* PE13 - PIN13 (input pullup).
|
|
* PE14 - PIN14 (input pullup).
|
|
* PE15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN1) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOE_PIN4) | \
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PIN_MODE_INPUT(GPIOE_PIN5) | \
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PIN_MODE_INPUT(GPIOE_PIN6) | \
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PIN_MODE_INPUT(GPIOE_PIN7) | \
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PIN_MODE_INPUT(GPIOE_PIN8) | \
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PIN_MODE_INPUT(GPIOE_PIN9) | \
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PIN_MODE_INPUT(GPIOE_PIN10) | \
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PIN_MODE_INPUT(GPIOE_PIN11) | \
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PIN_MODE_INPUT(GPIOE_PIN12) | \
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PIN_MODE_INPUT(GPIOE_PIN13) | \
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PIN_MODE_INPUT(GPIOE_PIN14) | \
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PIN_MODE_INPUT(GPIOE_PIN15))
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#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
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PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
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#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \
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PIN_OSPEED_HIGH(GPIOE_PIN1) | \
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PIN_OSPEED_HIGH(GPIOE_PIN2) | \
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PIN_OSPEED_HIGH(GPIOE_PIN3) | \
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PIN_OSPEED_HIGH(GPIOE_PIN4) | \
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PIN_OSPEED_HIGH(GPIOE_PIN5) | \
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PIN_OSPEED_HIGH(GPIOE_PIN6) | \
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PIN_OSPEED_HIGH(GPIOE_PIN7) | \
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PIN_OSPEED_HIGH(GPIOE_PIN8) | \
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PIN_OSPEED_HIGH(GPIOE_PIN9) | \
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PIN_OSPEED_HIGH(GPIOE_PIN10) | \
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PIN_OSPEED_HIGH(GPIOE_PIN11) | \
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PIN_OSPEED_HIGH(GPIOE_PIN12) | \
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PIN_OSPEED_HIGH(GPIOE_PIN13) | \
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PIN_OSPEED_HIGH(GPIOE_PIN14) | \
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PIN_OSPEED_HIGH(GPIOE_PIN15))
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#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
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PIN_PUPDR_PULLUP(GPIOE_PIN15))
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#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
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PIN_ODR_HIGH(GPIOE_PIN1) | \
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PIN_ODR_HIGH(GPIOE_PIN2) | \
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PIN_ODR_HIGH(GPIOE_PIN3) | \
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PIN_ODR_HIGH(GPIOE_PIN4) | \
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PIN_ODR_HIGH(GPIOE_PIN5) | \
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PIN_ODR_HIGH(GPIOE_PIN6) | \
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PIN_ODR_HIGH(GPIOE_PIN7) | \
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PIN_ODR_HIGH(GPIOE_PIN8) | \
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PIN_ODR_HIGH(GPIOE_PIN9) | \
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PIN_ODR_HIGH(GPIOE_PIN10) | \
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PIN_ODR_HIGH(GPIOE_PIN11) | \
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PIN_ODR_HIGH(GPIOE_PIN12) | \
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PIN_ODR_HIGH(GPIOE_PIN13) | \
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PIN_ODR_HIGH(GPIOE_PIN14) | \
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PIN_ODR_HIGH(GPIOE_PIN15))
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#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN7, 0U))
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#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
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PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
|
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PIN_AFIO_AF(GPIOE_PIN15, 0U))
|
|
|
|
/*
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* GPIOF setup:
|
|
*
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* PF0 - ARD_D7 (input pullup).
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* PF1 - ARD_D8 (input pullup).
|
|
* PF2 - PIN2 (input pullup).
|
|
* PF3 - PIN3 (input pullup).
|
|
* PF4 - PIN4 (input pullup).
|
|
* PF5 - PIN5 (input pullup).
|
|
* PF6 - PIN6 (input pullup).
|
|
* PF7 - PIN7 (input pullup).
|
|
* PF8 - PIN8 (input pullup).
|
|
* PF9 - PIN9 (input pullup).
|
|
* PF10 - PIN10 (input pullup).
|
|
* PF11 - PIN11 (input pullup).
|
|
* PF12 - PIN12 (input pullup).
|
|
* PF13 - PIN13 (input pullup).
|
|
* PF14 - PIN14 (input pullup).
|
|
* PF15 - PIN15 (input pullup).
|
|
*/
|
|
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_ARD_D7) | \
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PIN_MODE_INPUT(GPIOF_ARD_D8) | \
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PIN_MODE_INPUT(GPIOF_PIN2) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN3) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN4) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN5) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN6) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN7) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN8) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN9) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN10) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN11) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN12) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN13) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN14) | \
|
|
PIN_MODE_INPUT(GPIOF_PIN15))
|
|
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_ARD_D7) | \
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PIN_OTYPE_PUSHPULL(GPIOF_ARD_D8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
|
|
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
|
|
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_ARD_D7) | \
|
|
PIN_OSPEED_HIGH(GPIOF_ARD_D8) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN2) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN3) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN4) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN5) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN6) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN7) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN8) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN9) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN10) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN11) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN12) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN13) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN14) | \
|
|
PIN_OSPEED_HIGH(GPIOF_PIN15))
|
|
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_ARD_D7) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_ARD_D8) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
|
|
PIN_PUPDR_PULLUP(GPIOF_PIN15))
|
|
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_ARD_D7) | \
|
|
PIN_ODR_HIGH(GPIOF_ARD_D8) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN2) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN3) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN4) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN5) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN6) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN7) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN8) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN9) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN10) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN11) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN12) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN13) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN14) | \
|
|
PIN_ODR_HIGH(GPIOF_PIN15))
|
|
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_ARD_D7, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_ARD_D8, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN7, 0U))
|
|
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
|
|
PIN_AFIO_AF(GPIOF_PIN15, 0U))
|
|
|
|
/*===========================================================================*/
|
|
/* External declarations. */
|
|
/*===========================================================================*/
|
|
|
|
#if !defined(_FROM_ASM_)
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
void boardInit(void);
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
#endif /* _FROM_ASM_ */
|
|
|
|
#endif /* BOARD_H */
|