115 lines
3.8 KiB
C
115 lines
3.8 KiB
C
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file common/ARMCMx/nvic.c
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* @brief Cortex-Mx NVIC support code.
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*
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* @addtogroup COMMON_ARMCMx_NVIC
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* @{
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*/
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#include "hal.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Sets the priority of an interrupt handler and enables it.
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*
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* @param[in] n the interrupt number
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* @param[in] prio the interrupt priority
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*/
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void nvicEnableVector(uint32_t n, uint32_t prio) {
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#if defined(__CORE_CM0_H_GENERIC)
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NVIC->IP[_IP_IDX(n)] = (NVIC->IP[_IP_IDX(n)] & ~(0xFFU << _BIT_SHIFT(n))) |
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(NVIC_PRIORITY_MASK(prio) << _BIT_SHIFT(n));
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#else
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NVIC->IP[n] = NVIC_PRIORITY_MASK(prio);
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#endif
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NVIC->ICPR[n >> 5U] = 1U << (n & 0x1FU);
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NVIC->ISER[n >> 5U] = 1U << (n & 0x1FU);
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}
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/**
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* @brief Disables an interrupt handler.
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*
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* @param[in] n the interrupt number
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*/
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void nvicDisableVector(uint32_t n) {
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NVIC->ICER[n >> 5U] = 1U << (n & 0x1FU);
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#if defined(__CORE_CM0_H_GENERIC)
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NVIC->IP[_IP_IDX(n)] = NVIC->IP[_IP_IDX(n)] & ~(0xFFU << _BIT_SHIFT(n));
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#else
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NVIC->IP[n] = 0U;
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#endif
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}
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/**
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* @brief Changes the priority of a system handler.
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*
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* @param[in] handler the system handler number
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* @param[in] prio the system handler priority
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*/
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void nvicSetSystemHandlerPriority(uint32_t handler, uint32_t prio) {
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osalDbgCheck(handler < 12U);
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#if defined(__CORE_CM0_H_GENERIC)
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SCB->SHP[_SHP_IDX(handler)] = (SCB->SHP[_SHP_IDX(handler)] & ~(0xFFU << _BIT_SHIFT(handler))) |
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(NVIC_PRIORITY_MASK(prio) << _BIT_SHIFT(handler));
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#elif defined(__CORE_CM7_H_GENERIC)
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SCB->SHPR[handler] = NVIC_PRIORITY_MASK(prio);
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#else
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SCB->SHP[handler] = NVIC_PRIORITY_MASK(prio);
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#endif
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}
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/**
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* @brief Clears a pending interrupt source.
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*
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* @param[in] n the interrupt number
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*/
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void nvicClearPending(uint32_t n) {
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NVIC->ICPR[n >> 5] = 1 << (n & 0x1F);
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}
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/** @} */
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