113 lines
3.6 KiB
C
113 lines
3.6 KiB
C
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/*
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Copyright (C) 2014..2017 Marco Veeneman
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file TM4C129x/cmparams.h
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* @brief ARM Cortex-M4 parameters for the TM4C129x.
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*
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* @defgroup ARMCMx_TM4C129x TM4C129x Specific Parameters
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* @ingroup ARMCMx_SPECIFIC
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* @details This file contains the Cortex-M4 specific parameters for the
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* TM4C129x platform.
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* @{
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*/
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#ifndef CMPARAMS_H
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#define CMPARAMS_H
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/* Defines required for correct CMSIS header functioning */
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#define __MPU_PRESENT 1 /**< MPU present */
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#define __NVIC_PRIO_BITS 3 /**< Bits used for Priority Levels */
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#define __Vendor_SysTickConfig 1 /**< Use different SysTick Config */
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#define __FPU_PRESENT 1 /**< FPU present */
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/* The following two defines are needed by ChibiOS */
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#define SVCall_IRQn -5
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#define PendSV_IRQn -3
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/**
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* @brief Cortex core model.
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*/
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#define CORTEX_MODEL 4
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/**
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* @brief Floating Point unit presence.
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*/
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#define CORTEX_HAS_FPU 1
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/**
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* @brief Number of bits in priority masks.
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*/
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#define CORTEX_PRIORITY_BITS 3
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/**
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* @brief Number of interrupt vectors.
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* @note This number does not include the 16 system vectors and must be
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* rounded to a multiple of 8.
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*/
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#define CORTEX_NUM_VECTORS 120
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/* The following code is not processed when the file is included from an
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asm module.*/
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#if !defined(_FROM_ASM_)
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/* If the device type is not externally defined, for example from the Makefile,
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then a file named board.h is included. This file must contain a device
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definition compatible with the include file.*/
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#if !defined (PART_TM4C1290NCPDT) && !defined (PART_TM4C1290NCZAD) && \
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!defined (PART_TM4C1292NCPDT) && !defined (PART_TM4C1292NCZAD) && \
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!defined (PART_TM4C1294KCPDT) && !defined (PART_TM4C1294NCPDT) && \
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!defined (PART_TM4C1294NCZAD) && !defined (PART_TM4C1297NCZAD) && \
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!defined (PART_TM4C1299KCZAD) && !defined (PART_TM4C1299NCZAD) && \
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!defined (PART_TM4C129CNCPDT) && !defined (PART_TM4C129CNCZAD) && \
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!defined (PART_TM4C129DNCPDT) && !defined (PART_TM4C129DNCZAD) && \
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!defined (PART_TM4C129EKCPDT) && !defined (PART_TM4C129ENCPDT) && \
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!defined (PART_TM4C129ENCZAD) && !defined (PART_TM4C129LNCZAD) && \
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!defined (PART_TM4C129XKCZAD) && !defined (PART_TM4C129XNCZAD)
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#include "board.h"
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#endif
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typedef int IRQn_Type;
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#include "core_cm4.h"
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/* Including the TivaWare peripheral headers.*/
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#include "inc/hw_ints.h"
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#include "inc/hw_memmap.h"
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#include "inc/hw_types.h"
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#include "inc/hw_timer.h"
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#include "inc/hw_sysctl.h"
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#include "inc/hw_gpio.h"
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#include "inc/hw_uart.h"
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#include "inc/hw_timer.h"
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#include "inc/hw_emac.h"
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#include "inc/hw_i2c.h"
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#include "inc/hw_watchdog.h"
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#include "inc/hw_ssi.h"
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#include "inc/hw_udma.h"
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#include "inc/hw_pwm.h"
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#include "inc/hw_adc.h"
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#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8)
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#error "TivaWare NUM_INTERRUPTS mismatch"
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#endif
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#endif /* !defined(_FROM_ASM_) */
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#endif /* CMPARAMS_H */
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/** @} */
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